Conventional semiconductor power device such as a laterally diffused MOS (LDMOS) has a plurality of chip electrodes on a semiconductor chip located therein to regulate a large current thereby. The power device also has an interconnection having dimensions for connecting a plurality of gold (Au) wires thereon. The Au wires connect the chip electrodes and the interconnection by wire bonding method. In this case, a plurality of Au wires (for example, three Au wires) is bonded to connect the same number of chip electrodes (for example, three electrodes) and the interconnection by wire bonding method as shown in JP10-229100A.
The power devices require many chip electrodes on the semiconductor chip to flow a large current therein. This makes the dimensions of the semiconductor chip and the semiconductor device large.